This invention relates to active matrix display devices, and relates in particular to the circuitry used for providing drive signals to the pixels of the display.
Active matrix display devices typically comprise an array of pixels arranged in rows and columns. Each row of pixels shares a row conductor which connects to the gates of the thin film transistors of the pixels in the row. Each column of pixels shares a column conductor, to which pixel drive signals are provided. The signal on the row conductor determines whether the transistor is turned on or off, and when the transistor is turned on, by a high voltage pulse on the row conductor, a signal from the column conductor is allowed to pass on to an area of liquid crystal material, thereby altering the light transmission characteristics of the material. An additional storage capacitor may be provided as part of the pixel configuration to enable a voltage to be maintained on the liquid crystal material even after removal of the row electrode pulse. U.S. Pat. No. 5,130,829 discloses in more detail the design of an active matrix display device.
The frame (field) period for active matrix display devices requires a row of pixels to be addressed in a short period of time, and this in turn imposes a requirement on the current driving capabilities of the transistor in order to charge or discharge the liquid crystal material to the desired voltage level. In order to meet these current requirements, the gate voltage supplied to the thin film transistor needs to fluctuate between values separated by approximately 30 volts. For example, the transistor may be turned off by applying a gate voltage of around xe2x88x9210 volts, or even lower, (with respect to the source) whereas a voltage of around 20 volts, or even higher, may be required to bias the transistor sufficiently to provide the required source-drain current to charge or discharge the liquid crystal material sufficiently rapidly.
The requirement for large voltage swings in the row conductors requires the row driver circuitry to be implemented using high voltage components.
The voltages provided on the column conductors typically vary by approximately 10 volts, which represents the difference between the drive signals required to drive the liquid crystal material between white and black states. Various drive schemes have been proposed enabling the voltage swing on the column conductors to be reduced, so that lower voltage components may be used in the column driver circuitry. In the so-called xe2x80x9ccommon electrode drive schemexe2x80x9d, the common electrode, connected to the full liquid crystal material layer, is driven to an oscillating voltage. The so-called xe2x80x9cfour-level drive schemexe2x80x9d uses more complicated row electrode waveforms in order to reduce the voltage swing on the column conductors, using capacitive coupling effects.
These drive schemes enable lower voltage components to be used for the column driver circuitry. However, there is still a significant amount of complexity and power inefficiency in the column driver circuits. Each row is addressed in turn, and during the row address period of any one row, pixel signals are provided to each column. In the past, each column would be provided with a buffer for holding a pixel in the column to a drive signal level for the full duration of the row address period. This large number of buffers results in high power consumption.
There have been proposals to provide a multiplexing scheme, in which a buffer is shared between a group of columns. The output of the buffer is switched in turn to the columns of the group. When the buffer is providing a signal to one column, it is isolated from the other columns by a switch. Multiplexing is possible because the line time of the display is significantly greater than the time required to charge a column to the required voltage. In small displays for mobile applications, the line time may be in excess of 150 xcexcs whereas the time required to charge a column is typically less than 10 xcexcs.
Once the column has been charged to the required voltage, and after the end of the application of the required voltage to the column, charge transfer takes place between the charged column capacitance and the pixel capacitance. The column capacitance may be around 30 times larger than the column capacitance, so that the charge transfer to the pixel results in only a small voltage change. However, this charge transfer enables the pixel to be charged using a short column address pulse, despite the longer time constant of the pixel (resulting from the high TFT resistance).
A problem with this multiplexing approach is that there is cross talk between the columns within the group, particularly as all but one of the columns of the group are effectively floating at any point in time, and are therefore susceptible to signal level fluctuations. During the row address period, the TFTs of all pixels in the row are switched on (and indeed this enables the charge transfer to take place between the column capacitance and the pixel), so that any signal fluctuations on the column conductors as a result of cross talk are passed onto the pixels.
The invention provides an alternative approach for reducing the number of buffers required by the column driver circuitry.
According to a first aspect of the invention, there is provided a display device comprising an array of liquid crystal pixels arranged in rows and columns, wherein each column of pixels shares a column conductor to which pixel drive signals are provided, wherein column address circuitry is provided for generating the pixel drive signals, the column address circuitry comprising circuitry for generating all possible drive signal levels on separate signal level lines and a buffer associated with each signal level line, the outputs of the buffers being selectably switchable onto the columns, wherein the column address circuitry further comprises a memory for storing the signal levels to be provided to each column, and wherein the buffers are controlled in dependence on the stored signal levels.
The invention provides an alternative approach by which a grey level generation circuit is provided with a buffer for each possible grey level output. The response of the buffers is heavily dependent on the output load, and such buffers are typically designed to be suitable for specific ranges of output loads. As a result of the large number columns in a display, there is a very large variation in the output load of the buffers, as a function of the number of columns to which the buffer output is to be provided. Therefore, the buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.
In one example, a bias current to each buffer is controlled in dependence on the number of columns to which the buffer output is to be switched.
In another example, each signal level line is associated with a plurality of buffers, each of the plurality of buffers being suitable for different output loads, wherein one of the plurality of buffers is selected in dependence on the number of columns to which the buffer output is to be switched. Each signal level line may be associated with two buffers.
In another example, each buffer has a plurality of output stages, and wherein the number of output stages used is controlled in dependence on the number of columns to which the buffer output is to be switched.
In a further example, an additional buffer is provided and the additional buffer is used when the number of columns to which an individual buffer output is to be switched exceeds half the total number of columns.
These examples each provide arrangements which enable the output load required of each buffer to be used to provide control of the buffer configuration, in order to ensure stability of the buffer arrangements. The number of grey levels will typically be much smaller than the number of columns, so that the arrangement of the invention reduces the number of buffers required.
Preferably, each pixel comprises a thin film transistor switching device and a liquid crystal cell, wherein each row of pixels share a row conductor which connects to the gates of the thin film transistors of the pixels in the row, and wherein row driver circuitry provides row address signals for controlling the switching of the transistors of the pixels of the row.
According to a second aspect of the invention, there is provided a method of providing pixel drive signals to a display device comprising an array of liquid crystal pixels arranged in rows and columns, the method comprising:
generating all possible pixel drive signal levels;
providing each pixel drive signal level to an associated buffer;
storing the required pixel drive signals for a row of pixels in a memory;
calculating the required number of pixels of the row to be addressed by each drive signal;
controlling the buffers in dependence on the calculated number of pixels; and
switching the buffer outputs onto the columns during the row address period for the row to be addressed.
The step of controlling the buffers may comprise applying an appropriate bias current to the buffers, selecting between alternative buffers for each pixel drive signal level or selecting a number of output stages to be connected to each buffer.
The invention also provides column address circuitry for driving the columns of a liquid crystal display, comprising circuitry for generating all possible drive signal levels on separate signal level lines and a buffer associated with each signal level line, the outputs of the buffers being selectably switchable onto the column outputs, wherein the column address circuitry further comprises a memory for storing the signal levels to be provided to each column, and wherein the buffers are controlled in dependence on the stored signal levels.